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[components][lwp] fix signal ordering and ELF segment protection - #11895
BernardXiong wants to merge 2 commits into
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- keep FIFO order for signals carrying the same signal number - map ELF segments with permissions derived from p_flags - keep the scheduler usable while handling signals on RISC-V
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📌 Code Review Assignment🏷️ Tag: componentsReviewers: @Maihuanyi Changed Files (Click to expand)
🏷️ Tag: components_lwpReviewers: @xu18838022837 Changed Files (Click to expand)
📊 Current Review Status (Last Updated: 2026-10-18 22:15 CST)
📝 Review Instructions
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- expand the protection flag checks to braced statements - no functional change
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拉取/合并请求描述:(PR description)
为什么提交这份PR (why to submit this PR)
Signals with the same number were inserted in reverse order, ELF segments were always mapped read-write regardless of p_flags, and RISC-V signal handling ran with interrupts disabled while taking sleeping locks.
你的解决方案是什么 (what is your solution)
请提供验证的bsp和config (provide the config and bsp)
当前拉取/合并请求的状态 Intent for your PR
必须选择一项 Choose one (Mandatory):
代码质量 Code Quality:
我在这个拉取/合并请求中已经考虑了 As part of this pull request, I've considered the following:
#if 0代码,不包含已经被注释了的代码 All redundant code is removed and cleaned up